//Ryan Kral
//CSE320 HW#2
//Dr. Gilsdorf
//SIG_HYS is needed for buttonHandlerTop

module sig_hys
	#(parameter 	TURN_ON_CLOCK_COUNT = 65000,
			TURN_OFF_CLOCK_COUNT = 40000) 
	(input wire  clk, 
		     reset_b, 
		     dir_sig,
	 output wire fil_sig);
	
	reg [31:0] countOn;	//ints are params which are 32 bit regs
	reg [31:0] countOff;
	reg sync_one, sync_two, sync_three;
	reg Q;	

	wire sync_sig;
	
	
	//this block is used as a synchronizer for the input signal
	always @ (posedge clk, negedge reset_b) begin
		if(~reset_b) begin
			sync_one   <= 1'b0;
			sync_two   <= 1'b0;
			sync_three <= 1'b0;
		end
		else begin
			sync_one   <= dir_sig;
			sync_two   <= sync_one;
			sync_three <= sync_two;
		end
	end

	//this block increments the counters based on the synchronized input signal
	always @ (posedge clk, negedge reset_b) begin
		if(~reset_b) begin	//reset values
			Q        <= 0;
			countOn  <= 0;
			countOff <= 0;
		end
		else begin
			if(sync_sig == 1) begin		//if the signal is high then start the counterOn
				countOff <= 0;		//reset the other counter
				countOn  <= countOn + 1;
				if(countOn == TURN_ON_CLOCK_COUNT) begin	//value is reached, then go high
					Q <= 1'b1;
				end
			end
			else if(sync_sig == 0) begin	//if the signal is low then start the countOff
				countOn <= 0;		//reset the other counter
				countOff <= countOff + 1;
				if(countOff == TURN_OFF_CLOCK_COUNT) begin	//if value is reached then go low
					Q <= 1'b0;
				end
			end
		end
	end

	assign sync_sig = sync_one & sync_two & sync_three;
	assign fil_sig = Q;

endmodule
